1. Field of Invention
The present invention relates to a layout structure, and more particularly to a layout structure of electrostatic discharge (ESD) protection circuit.
2. Related Art
In order to prevent a signal terminal of an electronic system from being impacted by electrostatic discharge, an ESD protection circuit is coupled to the terminal of the system in the prior art.
As shown in FIG. 1, a conventional ESD protection circuit 1 is electrically connected between an input pad 21 and an core circuit 22. The input pad 21 receives an external signal and transmits the external signal to the core circuit 22. The core circuit 22 performs the special functions with respect to the different signals from the input pad 21 as the designer proposed. The ESD protection circuit 1 includes two diodes 11 and 12 respectively electrically connected to power terminal VDD and power terminal VSS. Similarly, the conventional ESD protection circuit 1 is also used in other pads, such as the output pad, the power pad and etc.
As shown in FIG. 2, a wiring architecture on the diode 11 is of an interdigitated layout, and the cross-sectional structures of lines A-A′ and B-B′ in FIG. 2 are shown in FIG. 3. The diode 11 is disposed on a substrate 16, and the wiring architecture on the diodes 11 and 12 sequentially includes electrically conductive layers 15, 14 and 13. The electrically conductive layer 13 is electrically connected to the input pad 21 and the power terminal VDD. The electrically conductive layer 13 on the diode 12 is electrically connected to the input pad 21 and the power terminal VSS. In addition, the diodes 11 and 12 of the ESD protection circuit 1 may also be replaced by transistors in the prior art. For example, the diode 11 may be replaced by a P-type metal oxide semiconductor (PMOS), and the diode 12 may be replaced by an N-type metal oxide semiconductor (NMOS).
When a discharge current is inputted to the input pad 21 from a signal wire, the diodes 11 and 12 are turned on by the discharge current. The discharge current does not flow into the core circuit 22, and the core circuit 22 is free from being impacted by the discharge current.
Although the core circuit 22 is free from being impacted by the discharge current according to the ESD protection circuit 1, the wire layout of the ESD protection circuit 1 produces the huge stray capacitances due to the coupling of the wires. The stray capacitances are induced between two of the metallic layers 13 to 15, and between the substrate 16 and any one of the metallic layers 13 to 15. When the input pad 21 is disposed on the metallic layer 13, the stray capacitance between the input pad 21 and the metallic layers 13 to 15 causes a larger equivalent stray capacitance coupling to the core circuit 22.
The larger equivalent stray capacitance is coupled to the core circuit 22, the driving loading of the core circuit 22 is larger. For example, when the core circuit 22 is a low noise amplifier of the radio frequency communication device, the stray capacitance is also an extra driving loading for the core circuit 22, thereby decreasing the efficiency of the core circuit 22.
It is therefore an important subject of the present invention to provide a layout structure of electrostatic discharge protection circuit capable of reducing the stray capacitance between wires, reducing the influence of the ESD protection circuit on the cooperated electronic system, and enhancing the efficiency of the cooperated electronic system.